1. Field
Embodiments of the invention relate to semiconductor processing and, in particular, to etching.
2. Description of the Related Art
Etching processes can be used to form vias and other structures on a substrate. For example, an etching process can be used for etching wafers in heterojunction bipolar transistor (HBT) or bipolar field effect transistor (BiFET) GaAs processes.
It can be desirable to minimize the geometries of features formed using etching processes. Furthermore, it can be desirable to reduce the frequency of maintenance and repair of an etcher, in order to improve throughput and to reduce manufacturing costs.
Accordingly, there is a need for improved methods of etching wafer features.